#Cryptographic logical device, #encoder
Cryptographic logical device for encoders.
Pat. 5365591 USA, IPC N 04 K 1/00.- Publ. 11/15/94.
The US patent described below notes that modern encoders implement complex cryptographic algorithms and contain a number of microprocessors that perform various functions in the process of encrypting information.
Due to the high complexity of cryptographic algorithms and functional microprocessors of encoders, errors and failures may occur during the encryption process, which may lead to the transmission of information to be encrypted in clear text.
Therefore, it is highly desirable to have a cryptographic logical device (CLD) in the encoders, consisting of several flexibly controlled control microprocessors and error and failure detection circuits for quickly determining the causes and locations of disruption of the normal operation of the encoder.
This patent provides a description of such a cryptographic logical device for a channel encoder, connected between the terminal and the user's modem.
The encoder contains a cryptoprocessor for encrypting and decrypting information transmitted and received via communication channels, a «red» processor for processing open unencrypted information, and a «black» processor for processing encrypted information.
The red and black processors contain a microprocessor, an input/output device, a read-only memory, and a random-access memory connected to each other.
Both processors are connected to their modems and to the command processor in the cryptoprocessor.
The command processor can be programmed to execute various cryptographic algorithms, such as DES, etc.
The CLU included in the cryptoprocessor contains an arithmetic logic unit (ALU), a permutation unit, and a nonlinear combining unit.
The arithmetic logic unit, the permutation unit, and the combining unit are connected to the input buses A and B of the cryptoprocessor in parallel and to its output bus C through multiplexers.
The arithmetic logic unit supports Boolean and arithmetic operations.
The bitwise Boolean operations performed include AND, OR, and inversion, and the arithmetic operations include addition, addition with carry, subtraction, and subtraction with carry.
The permutation unit performs permutations of the data entered into it based on the contents of its memory with an arbitrary selection in a given sequence.
Multiple permutations can be specified during the initialization time before the start of the execution of the cryptographic logic device's crypto-algorithm.
The command to perform certain permutations is sent to this block via the command bus.
The nonlinear merge block increases the performance of the cryptographic logic device by simultaneously performing several nonlinear merge operations.
These operations are performed according to the look-up table access scheme.
Such tables are located in the random access memory of this block.
The cryptographic logic device also has a distributed circuit for full self-diagnostics, which ensures the encoder's trouble-free operation.
This circuit monitors the operation of all functional elements of the cryptographic logic device in real time and, if a fault is detected, blocks the output of the cryptographic logic device to the C bus, i.e., thus preventing the operation of the cryptographic logic device in open transmission mode.
Each functional element of the cryptographic logical device has its own self-diagnostic circuits, due to which the entire self-diagnostic system operates at a higher speed than in conventional encoders.
In an encoder with a cryptographic logical device, its status is continuously indicated, an error or malfunction signal is generated during one clock cycle.
Open information to be transmitted in encrypted form is entered into the red processor, and from it — into the cryptographic logical device.
Similarly, the received encrypted information to be decrypted is entered into the black processor, and from it — in the cryptoprocessor.
The advantage of the proposed cryptographic logical device is the programmed execution of the cryptoalgorithm and the highly reliable operation of the encoder due to the use of self-diagnostic logical circuits that quickly determine the nature and location of faults and prevent the possibility of transmitting important information in unencrypted form.